ASIC: Gate Arrays, Embedded Arrays and Standard Cells
JTAG (boundary scan)
SANYO supplies JTAG circuits that conform to the IEEE 1149.1-1-1990 and 1149.1a-1993 standards.
The JTAG (boundary scan) standard is an international standard concerning test circuits that are added internally to the IC to facilitate highly efficient circuit testing on the printed circuit board. Normally, five dedicated pins are required to embed JTAG functionality, and the gate count increases as well.
